PIC18F45K20-I/MV【PDF 203/234 页】MCU 32KB FLASH 1536B RAM 40-UQFN

收藏本站

您好，
买卖IC网欢迎您。
请登录
免费注册

买卖IC网

Sheet目录3873

199页 200页 201页 202页 [203页]204页 205页 206页 207页

dsPIC33F

DS70165E-page 68

Preliminary

2007 Microchip Technology Inc.

TABLE 3-35:

FUNDAMENTAL ADDRESSING MODES SUPPORTED

3.3.3

MOVE AND ACCUMULATOR

INSTRUCTIONS

Move instructions and the DSP accumulator class of

instructions provide a greater degree of addressing

flexibility than other instructions. In addition to the

Addressing modes supported by most MCU instruc-

tions, move and accumulator instructions also support

mode, also referred to as Register Indexed mode.

In summary, the following Addressing modes are

supported by move and accumulator instructions:

8-bit Literal

16-bit Literal

3.3.4

MAC

INSTRUCTIONS

The dual source operand DSP instructions (CLR, ED,

EDAC

, MAC, MPY, MPY.N, MOVSAC and MSC), also referred

to as MAC instructions, utilize a simplified set of address-

ing modes to allow the user to effectively manipulate the

data pointers through register indirect tables.

The 2-source operand prefetch registers must be

members of the set {W8, W9, W10, W11}. For data

reads, W8 and W9 are always directed to the X RAGU

and W10 and W11 will always be directed to the Y

AGU. The effective addresses generated (before and

after modification) must, therefore, be valid addresses

within X data space for W8 and W9 and Y data space

for W10 and W11.

In summary, the following addressing modes are

supported by the MAC class of instructions:

3.3.5

OTHER INSTRUCTIONS

Besides the various addressing modes outlined above,

some instructions use literal constants of various sizes.

For example, BRA (branch) instructions use 16-bit signed

literals to specify the branch destination directly, whereas

the DISI instruction uses a 14-bit unsigned literal field. In

some instructions, such as ADD Acc, the source of an

operand or result is implied by the opcode itself. Certain

operations, such as NOP, do not have any operands.

3.4

Modulo Addressing

Modulo Addressing mode is a method of providing an

automated means to support circular data buffers using

hardware. The objective is to remove the need for soft-

ware to perform data address boundary checks when

executing tightly looped code, as is typical in many

DSP algorithms.

Modulo Addressing can operate in either data or program

space (since the data pointer mechanism is essentially

the same for both). One circular buffer can be supported

in each of the X (which also provides the pointers into

program space) and Y data spaces. Modulo Addressing

can operate on any W register pointer. However, it is not

Addressing Mode

Description

File Register Direct

The address of the file register is specified explicitly.

The contents of a register are accessed directly.

The contents of Wn forms the EA.

The contents of Wn forms the EA. Wn is post-modified (incremented or

decremented) by a constant value.

Wn is pre-modified (incremented or decremented) by a signed constant value

to form the EA.

The sum of Wn and a literal forms the EA.

Note:

For the MOV instructions, the Addressing

mode specified in the instruction can differ

for

the

source

and

destination

EA.

However, the 4-bit Wb (Register Offset)

field is shared between both source and

destination (but typically only used by

one).

Note:

Not

all

instructions

support

all

the

Addressing modes given above. Individual

instructions may support different subsets

of these Addressing modes.

Note:

Addressing mode is only available for W9

(in X space) and W11 (in Y space).

发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购

采购需求

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

我的联系方式